Change register field definitions to CMSIS style#10
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Pull request overview
This PR migrates register-field handling across wolfHAL to a CMSIS-style *_Pos/*_Msk pattern and updates helper APIs to avoid relying on __builtin_ctz for field positioning.
Changes:
- Update
whal_Reg_Getand bitfield helpers to use explicit mask+position (msk,pos) instead of deriving shifts from masks. - Convert STM32WB and PIC32CZ drivers to CMSIS-style register field macros (
*_Pos,*_Msk) and update call sites accordingly. - Update unit tests and the PIC32CZ example to match the new register-field API.
Reviewed changes
Copilot reviewed 25 out of 25 changed files in this pull request and generated 2 comments.
Show a summary per file
| File | Description |
|---|---|
| wolfHAL/regmap.h | Updates whal_Reg_Get API and docs to accept mask + position. |
| wolfHAL/platform/st/stm32wb55xx.h | Adds .enablePos alongside .enableMask for RCC clock descriptors. |
| wolfHAL/clock/stm32wb_rcc.h | Extends clock enable descriptor with enablePos and updates example. |
| wolfHAL/clock/pic32cz_clock.h | Switches mask macros to WHAL_BITMASK form; adds mclkEnablePos. |
| wolfHAL/bitops.h | Replaces mask-derived shift helpers with WHAL_BITMASK and whal_{Set,Get}Bits(msk,pos,…). |
| tests/stm32wb/test_gpio.c | Updates register-field reads to pass explicit pos. |
| tests/stm32wb/test_flash.c | Converts LOCK bit definitions to CMSIS-style _Pos/_Msk and updates reads. |
| tests/stm32wb/test_clock.c | Updates whal_Reg_Get calls to include pos. |
| tests/sim/test_bitops.c | Updates bitops tests for WHAL_BITMASK and new whal_{Set,Get}Bits signatures. |
| tests/pic32cz/test_gpio.c | Updates register-field reads to pass explicit pos. |
| tests/pic32cz/test_clock.c | Converts CHEN bit definitions to _Pos/_Msk and updates reads. |
| src/uart/stm32wb_uart.c | Converts UART register fields to _Pos/_Msk and updates bit ops / reads. |
| src/uart/pic32cz_uart.c | Converts SERCOM USART fields to _Pos/_Msk; updates sync polling and data/flag ops. |
| src/timer/systick.c | Converts SysTick fields to _Pos/_Msk and updates bit ops. |
| src/supply/pic32cz_supc.c | Adjusts VREGCTRL enable/disable register writes under new bitfield approach. |
| src/spi/stm32wb_spi.c | Converts SPI fields to _Pos/_Msk and updates bit ops / reads. |
| src/rng/stm32wb_rng.c | Converts RNG fields to _Pos/_Msk and updates bit ops / reads. |
| src/reg.c | Updates whal_Reg_Get implementation to use whal_GetBits(msk,pos,…). |
| src/gpio/stm32wb_gpio.c | Updates GPIO field masks to WHAL_BITMASK and uses explicit positions. |
| src/gpio/pic32cz_gpio.c | Converts GPIO PMUX/PINCFG access to _Pos/_Msk and uses explicit positions. |
| src/flash/stm32wb_flash.c | Converts flash register fields to _Pos/_Msk and updates reads/updates. |
| src/flash/pic32cz_flash.c | Converts FCW fields to _Pos/_Msk and updates reads/updates. |
| src/clock/stm32wb_rcc.c | Converts RCC fields to _Pos/_Msk; updates enable/disable to use enablePos. |
| src/clock/pic32cz_clock.c | Converts clock register fields to _Pos/_Msk; updates enable/disable and generator/PLL setup. |
| examples/pic32cz/pic32cz_curiosity_ultra.c | Updates peripheral clock descriptor to include mclkEnablePos. |
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Pull request overview
Copilot reviewed 25 out of 25 changed files in this pull request and generated 2 comments.
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Pull request overview
Copilot reviewed 27 out of 27 changed files in this pull request and generated 3 comments.
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| #define WHAL_PIC32CZ_SUPPLY_PLL \ | ||
| .enableMask = (1 << 18) | ||
| .enableMask = (1 << 18), \ |
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WHAL_PIC32CZ_SUPPLY_PLL still uses (1 << 18) for the mask. Left-shifting a signed int is undefined if it reaches the sign bit and is generally avoided in the rest of this PR (most other masks were updated to 1UL << ...). Consider switching this to 1UL << 18 (or another unsigned type matching the register width) for consistent/defined behavior.
| .enableMask = (1 << 18), \ | |
| .enableMask = (1UL << 18), \ |
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To avoid compiler builtin_ctz dependency, switch to CMSIS style register field macros